The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech).Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees, supporting eight laboratories in over 20 locations around the country and performing more than $940 million of problem-solving research annually for government and industry.GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry.

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Over the next decade, Georgia Tech will become an example of inclusive innovation, a leading technological research university of unmatched scale, relentlessly committed to serving the public good; breaking new ground in addressing the biggest local, national, and global challenges and opportunities of our time; making technology broadly accessible; and developing exceptional, principled leaders from all backgrounds ready to produce novel ideas and create solutions with real human impact.

TMPO researches microelectronic applications, CAD tools, architectures, and materials to evaluate the security, trust, and reliability of microelectronic devices and the critical systems which rely upon them. TMPO develops tools and techniques in the areas of assurance, anti-tamper, and reliability for FPGAs, ASICs, SoCs, microcontrollers, and other microelectronics. TMPO employees are Research Faculty of Georgia Tech and have the opportunity for dual appointments and teaching positions with other departments of the university. TMPO is a division of GTRI's cyber security lab which contains 300+ engineers and scientists and represents >10% of the total research award funding at Georgia Tech.

Microelectronics expert to research and contribute to the design, synthesis, characterization, packaging, testing, reliability, security, and trustworthiness of nano-fabricated microelectronic semiconductor devices. This may include research of prototype or commercial semiconductor devices and tools, e.g., ASICs, FPGAs. This position involves close collaboration with a highly technical team of research leaders to accomplish task and program objectives, contribute technically to proposal ideation, and conceive and execute internal research efforts refining core research processes and capabilities. Responsibilities range from CAD/EDA tools development, semiconductor nano-device design, fabrication, and verification, to clean-room equipment utilization. Formal methods and other advanced algorithmic techniques will be leveraged to enable and evaluate security and trustworthiness pre and post-fabrication. The position will utilize a wide range of knowledge from semiconductor physics to micro/nano synthesis and fabrication tools, and develop novel techniques, algorithms, and tools to evaluate CAD/EDA flows, architectures, materials, and fabricated devices with new properties and features.

• Design and execute experiments, or create custom simulations to determine physical parameters/properties and behaviors of microelectronic semiconductor devices, and perform advanced data analysis on the results of measurements and/or simulations
• Design firmware/software with advanced non-standard microelectronic design EDA tools (e.g. TORC, RapidWright, NextPNR, VPR, Yosys)
• Design advanced algorithms covering formal verification, graph analysis, data analysis, clustering, and more -Utilize advanced microelectronics laboratory equipment (probe stations, X-ray, CT Scanners) to support design, analysis, and verification tasks
• Develop and maintain expertise in a combination of the following languages: Verilog, VHDL, Python, C++, Rust, Kotlin, and Java (or similar)
• Contribute multiple sections technical reports and presentations -Contribute to white papers and competitive proposals -Present research and progress to customers or at working groups

• Develop software infrastructure for implementing security and trust mechanisms within microelectronic systems
• Develop software to support analysis, design, testing, assurance, and emulation of microelectronics
• Leveraging and extending conventional EDA/CAD tools to provide security enhancements to microelectronics
• Detailed modeling of microelectronic architecture
• Developing novel synthesis, implementation, and place & route algorithms for ASICs and FPGA designs
• Researching formal assurance of design tools and algorithms

* Experience in software development, programming with one or more software languages, e.g., C/C++, Rust, Java, Python
* Demonstrated knowledge and understanding of various algorithms and data structure design
* Demonstrated knowledge of software testing methods
* Familiarity with revision control concepts and tools, e.g., Git
* Comfortable developing and working in a Linux environment

• Active Top Secret Clearance
• Experience designing or extending EDA/CAD tools
• Experience with one of the following frameworks: RapidWright, TORC, RapidSmith, VPR or VTR
• Knowledge of formal methods for verification and validation
• Experience developing modeling, simulation, or emulation environments
• Knowledge of graph theory/analytics/visualization or combinatorial mathematics
• Experience with cross-compiling for various targets

<10% travel

This position vacancy is an open-rank announcement. The final job offer will be dependent on candidate qualifications in alignment with Research Faculty Extension Professional ranks as outlined in section of the Georgia Tech Faculty Handbook

• 2 years of related experience with a Bachelor's degree in Computer Science, Computer Engineering, Physics, Mathematics, Electrical Engineering, or similar technical area
• 0 years of related experience with a Masters' degree in Computer Science, Computer Engineering, Physics, Mathematics, Electrical Engineering, or similar technical area

Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens.

Candidates must be able to obtain and maintain an active security clearance.

Comprehensive information on currently offered GTRI benefits, including Health & Welfare, Retirement Plans, Tuition Reimbursement, Time Off, and Professional Development, can be found through this link:

The Georgia Institute of Technology (Georgia Tech) is an Equal Employment Opportunity Employer. The University is committed to maintaining a fair and respectful environment for all. To that end, and in accordance with federal and state law, Board of Regents policy, and University policy, Georgia Tech provides equal opportunity to all faculty, staff, students, and all other members of the Georgia Tech community, including applicants for admission and/or employment, contractors, volunteers, and participants in institutional programs, activities, or services. Georgia Tech complies with all applicable laws and regulations governing equal opportunity in the workplace and in educational activities.

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